Comments for mikestirling.co.uk

Comment on ZX Spectrum on an FPGA by Dirk

Dirk — Tue, 01 May 2012 20:08:36 +0000

Hi, the Core works really nice.
But how can i get the ZXMMC+ feature into flash rom ?
Dirk

Comment on ZX Spectrum on an FPGA by Mike

Mike — Sun, 01 Apr 2012 22:03:25 +0000

Hi Domenico,

I remember having the same problem using more than 2 partitions at once (in ResiDOS I assume?) I don’t have a solution I’m afraid, but the behaviour should be exactly the same as a real ZXMMC, so if you find a solution for the real Spectrum then it should still work on the DE1.

It would be very easy to make the Minimig joystick interface work with the Spectrum design, but I don’t have time to work on it at the moment. I remember the Kempston joystick interface was just a latch mapped to IN 31 (in fact I think it was selected whenever A4-A0 = 1). The VHDL to implement this would be trivial. If you want to have a go at adding it then you should find it similar to the ULA input latch for the keyboard and tape.

Mike

Comment on ZX Spectrum on an FPGA by Domenico-Roma-Ita

Domenico-Roma-Ita — Sun, 01 Apr 2012 14:18:30 +0000

Hello Mike ! Thank you for your strong design of the Spectrum for Altera DE1.
I touched the keyboard of the spectrum for many years now and I dusted off my old tapes to try to load them on the memory card.
A small problem, I created 4 partitions on a 512MB SD with the command
New Data” nnn “, 16
but I can activate only 2 at a time eg.
move “a:” in “games” asn – return the message OK, 0:1
move “B:” in “utils” asn – return the message OK, 0:1
move “c:” in “snap48″ asn – return the message “Out of XDPBs, 0:1
so if I use C: I have to remove A: or B:
One other question, there are plans to connect a joystick to GPIO Connector of the DE1? On another site I found the pattern for the Joy of Minimig (amiga 500 on DE1) Very Simple, 14 resistor 2,7Kohm and 2 connectors Canon 9 Male.
Thank You and Happy Easter !!!
Domenico

Comment on ZX Spectrum on an FPGA by Mike

Mike — Mon, 26 Mar 2012 12:21:01 +0000

Hi Ben. The video output is quite true to the real thing, which was not particularly PAL compliant. It should work fine with a CRT television in PAL mode, but YMMV with a flat screen because it will depend on how picky the video decoder is. The VGA mode is simply a double-scanned version of the TV line timings (so each line is scanned out twice in half the time). This results in a 50 Hz VGA signal that one of my TFT monitors has no problem displaying, but another newer one refuses. I suspect that any issues your TV might have with PAL mode would be because it is non-interlaced. Perhaps modifying the vertical sync logic to generate the necessary half line offset on alternate fields would solve that problem. There shouldn’t really be any change to the display as long as the same video data was output on each field. To get the VGA mode to work with newer monitors it would be necessary to implement a framebuffer to decouple the ULA video timing from the display. Someone has implemented such a thing on the BBC project as part of a port to a Xilinx board with only HDMI out. As a quick hack you could just change the speed of the entire design such that the video refresh rate was 60 Hz, but this will speed up the Spectrum as well, and you might need to tweak the blanking to keep everything in spec.

To answer your previous comment, I guess you need to start with an idea for something you want to implement. Anything with strict timing requirements or a lot of high-speed parallel operations would often be better suited to FPGA implementation rather than, say, using a microcontroller or even a DSP. Video processing and high-end software radio are good examples. An as-yet unreleased project I used the board for was to do a digital capture of a S/PDIF digital audio stream onto SD card as a means for ripping Minidiscs to FLAC. Some extra logic read the track number from the subcode data and used this to build an index on the SD card for automating the encoding process.

There are a lot of interesting building-blocks and whole projects on Opencores, and also check out the DE1 port of Minimig if you haven’t already.

I’m afraid family commitments are going to be taking up a lot of my time for the foreseeable future, so further replies are likely to be sparse. I do still read all the comments, though, and will endeavour to answer anything quick all the same.

Mike

Comment on ZX Spectrum on an FPGA by Ben

Ben — Sun, 25 Mar 2012 20:18:03 +0000

Hmm, and my TV also refuses the signal. I did try reducing the blanking period although I just managed to make the screen dark..I don’t really know what I’m doing

Comment on ZX Spectrum on an FPGA by Ben

Ben — Sat, 24 Mar 2012 21:00:57 +0000

Heh, having recently got a DE1 board this is quite interesting. The most annoying thing is my monitor happily displays the video output while having a big “Unsupported” box on the screen. My other monitor refuses to output anything. At least it works

I wondered, how did you get started with FPGAs, I’ve spent a while messing around with other peoples projects, Zet, your two and some others but don’t know where to start myself.

Comment on ZX Spectrum on an FPGA by Mike

Mike — Sat, 17 Mar 2012 23:22:47 +0000

Glad to hear you made some progress and sorry I never got chance to reply sooner. Looking forward to seeing a write-up! Are you loading the tzx images over a tape interface using something like playtzx or did you implement something to load them directly?

Comment on ZX Spectrum on an FPGA by Kamikadze

Kamikadze — Fri, 16 Mar 2012 10:33:32 +0000

Hello,
it seems I’ve successfully dealt with all the problems. I got almost fully working ZX Spectrum 48K emulator on Xilinx Spartan 3 board, yesterday I played Pac-Man (i use TZX tape images). Last thing missing is sound system and decoding for a few TZX ID blocks. Thank you very much for your help with T80 processor.

Comment on ZX Spectrum on an FPGA by Kamikadze

Kamikadze — Thu, 08 Mar 2012 16:49:23 +0000

Hello,
Let me thank you once more for all your advices, I really appreciate them. I’ve been working on my project for a few hours again and it seems you were right — the simulator isn’t absolutely reliable and the CPU seems to run well. I found a mistake in my VGA block. I read VGA data for printing first sign when pixel_x = 0 but this state lasts for a really long time (because of synchronization). I fixed this issue and now I got to state when the screen is white and there’s a black text 1982 Sinclair Research on the bottom of the screen.
If I’m right the Spectrum is waiting for some key to be pressed and after that I will be able to see flashing cursor and my written text/commands. I tried to import my PS2 keyboard block but it doesn’t seem to work. I have a counter running at same clock as T80 (3,5 MHz) counting to 69888 (~20 ms on 3,5 MHz clock). Then I set INT_n to 0 and wait for 32 T states. Then I raise INT_n back to 1 and count again (these numbers I read in book The ZX Spectrum ULA: How to Design a Microcomputer). So I think INT_n generator is fine and T80 should call keyboard scanning routine. I write data from keyboard to DATA_IN bus of T80 if MREQ_n = ’1′ and IORQ_n = ’0′ and RD_n = ’0′. I’m not sure if this condition is correct. The memory/PS2 keyboard block is in my opinion fine, solo it runs well both in simulation and hardware (switches = address bus, LEDs = D_IN bus).

Comment on ZX Spectrum on an FPGA by Mike

Mike — Sun, 04 Mar 2012 23:48:16 +0000

The crazy colours thing is something I have come across, caused by a problem with the RAM timing in my case. Are you sharing the RAM between ULA and CPU in the same way that I am (accesses on different clock phases), or do you have a different scheme?

Assuming you are using an external SRAM make sure you re-register all the control signals as well as the address bus. I had problems where the write strobe would be skewed relative to the address, which would occasionally result in data corruption. The skew was tiny – almost invisible on a 100 MHz scope – but enough to be a problem. Of course this re-registration leads to an extra cycle delay, which is why I output the video address during CPU cycles and the CPU address during video cycles. Search for “Synchronous outputs to SRAM” in spectrum_de1.vhd.